pathsim.blocks.converters module

class pathsim.blocks.converters.ADC(n_bits=4, span=[-1, 1], T=1, tau=0)[source]

Bases: Block

Models an ideal Analog-to-Digital Converter (ADC).

This block samples an analog input signal periodically, quantizes it according to the specified number of bits and input span, and outputs the resulting digital code on multiple output ports. The sampling is triggered by a scheduled event.

Functionality:

  1. Samples the analog input inputs[0] at intervals of T, starting after delay tau.

  2. Clips the input voltage to the defined span [min_voltage, max_voltage].

  3. Scales the clipped voltage to the range [0, 1].

  4. Quantizes the scaled value to an integer code between 0 and 2^n_bits - 1 using flooring.

  5. Converts the integer code to an n_bits binary representation.

  6. Outputs the binary code on ports 0 (LSB) to n_bits-1 (MSB).

Ideal characteristics:

  • Instantaneous sampling at scheduled times.

  • Perfect, noise-free quantization.

  • No aperture jitter or other dynamic errors.

Parameters:

  • n_bits (int, optional) – Number of bits for the digital output code. Default is 4.

  • span (list[float] or tuple[float], optional) – The valid analog input value range [min_voltage, max_voltage]. Inputs outside this range will be clipped. Default is [-1, 1].

  • T (float, optional) – Sampling period (time between samples). Default is 1 time unit.

  • tau (float, optional) – Initial delay before the first sample is taken. Default is 0.

events

Internal scheduled event responsible for periodic sampling and conversion.

Type:

list[Schedule]

class pathsim.blocks.converters.DAC(n_bits=4, span=[-1, 1], T=1, tau=0)[source]

Bases: Block

Models an ideal Digital-to-Analog Converter (DAC).

This block reads a digital input code periodically from its input ports, reconstructs the corresponding analog value based on the number of bits and output span, and holds the output constant between updates. The update is triggered by a scheduled event.

Functionality:

  1. Reads the digital code from input ports 0 (LSB) to n_bits-1 (MSB) at intervals of T, starting after delay tau.

  2. Interprets the inputs as an unsigned binary integer code.

  3. Converts the integer code to a fractional value between 0 and (2^n_bits - 1) / 2^n_bits.

  4. Scales this fractional value to the specified analog output span.

  5. Outputs the resulting analog value on outputs[0].

  6. Holds the output value constant until the next scheduled update.

Ideal characteristics:

  • Instantaneous update at scheduled times.

  • Perfect, noise-free reconstruction.

  • No glitches or settling time.

Parameters:

  • n_bits (int, optional) – Number of digital input bits expected. Default is 4.

  • span (list[float] or tuple[float], optional) – The analog output value range [min_voltage, max_voltage] corresponding to the digital codes 0 and 2^n_bits - 1, respectively (approximately). Default is [-1, 1].

  • T (float, optional) – Update period (time between output updates). Default is 1 time unit.

  • tau (float, optional) – Initial delay before the first output update. Default is 0.

events

Internal scheduled event responsible for periodic updates.

Type:

list[Schedule]